General Purpose Register - GPR storage

Enhanced Definition

General Purpose Registers (GPRs) are high-speed storage locations within the Central Processing Unit (CPU) of an IBM mainframe, used to temporarily hold data, addresses, and intermediate results during program execution. They are fundamental to the z/Architecture's instruction set, providing the fastest possible access to values frequently used by the CPU.

Key Characteristics

- Number and Size: There are 16 GPRs, typically referred to as R0 through R15. In 31-bit addressing mode, they are treated as 32-bit registers, while in 64-bit addressing mode, they are 64-bit.
- Volatile Storage: GPRs are volatile; their contents are not preserved across program context switches or system calls unless explicitly saved by the operating system or the program itself.
- Direct CPU Access: They are directly accessible by the CPU's Arithmetic Logic Unit (ALU), enabling extremely fast data manipulation and address calculations, significantly faster than accessing main memory.
- Multi-purpose Role: GPRs serve as operands for arithmetic and logical instructions, as base registers for address calculation, and as index registers for array processing.
- Implicit Usage: While explicitly manipulated in Assembler, compilers for languages like COBOL and PL/I implicitly manage GPR usage when generating machine code.

Use Cases

- Arithmetic and Logical Operations: Holding values for operations such as addition, subtraction, multiplication, division, and bitwise logical operations (e.g., AR R1,R2 to add the content of R2 to R1).
- Base Register for Addressing: Providing the base address component in base-displacement addressing, allowing instructions to access data in main storage relative to a known base (e.g., L R1,100(R3) to load R1 from the location 100 bytes past the address in R3).
- Index Register for Array Processing: Used as an index to access elements within an array or table, often combined with a base register to form an effective address (e.g., L R1,0(R2,R3) to load R1 from the location pointed to by (R2 + R3)).
- Loop Counters and Control Variables: Storing iteration counts or flags to control program flow within loops or conditional branches, offering fast access for comparison and modification.
- Parameter Passing: In standard linkage conventions (e.g., for calling subroutines), specific GPRs (like R0, R1) are used to pass parameters or the addresses of parameter lists between calling and called programs.

Related Concepts

GPRs are fundamental to the z/Architecture and its instruction set, directly influencing how programs are written in Assembler language and how compilers generate efficient machine code for languages like COBOL and PL/I. They are integral to base-displacement addressing, the primary mechanism for accessing data in main storage. The Program Status Word (PSW) contains the addressing mode bit (AMODE 31 or AMODE 64), which dictates how GPR contents are interpreted as addresses. System services and linkage conventions define specific GPR usage for passing control and data between program modules and the operating system.