ILC - Instruction Length Code
The Instruction Length Code (ILC) is a 2-bit field within the Program Status Word (PSW) on IBM mainframe systems that indicates the length of the last instruction executed or the instruction that caused an interruption. It is crucial for the CPU to correctly fetch the next instruction and for the operating system to diagnose program errors.
Key Characteristics
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- Location in PSW: The ILC is a 2-bit field located in bits 32-33 of the
Program Status Word (PSW)in z/Architecture (and S/390 architecture). - Instruction Length Representation: It specifies the length of an instruction in halfwords (2-byte units). A value of 1 means 2 bytes, 2 means 4 bytes, and 3 means 6 bytes. A value of 0 is reserved or indicates an invalid length.
- CPU Control: The CPU uses the ILC to determine how many bytes to advance the
Instruction Address (IA)field of the PSW after executing an instruction, ensuring sequential program flow. - Program Check Diagnosis: In the event of a program check (e.g.,
operation exception,specification exception), the ILC in the new PSW (after the interruption) points to the length of the instruction that caused the exception, aiding in problem determination. - Architecture Dependent: While its purpose is consistent, the exact bit location and interpretation might slightly vary across different IBM mainframe architectures (e.g., System/360, System/370, S/390, z/Architecture), though the 2-bit, halfword-based encoding is standard for modern systems.
- Location in PSW: The ILC is a 2-bit field located in bits 32-33 of the
Use Cases
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- Normal Instruction Execution: During normal program execution, the CPU uses the ILC to increment the
Instruction Addressin the PSW, pointing to the next instruction to be fetched. - Program Check Handling: When a program attempts an invalid operation (e.g., an undefined instruction code), the system generates a program check, and the ILC in the resulting
Program Status Wordidentifies the length of the offending instruction. - Debugging and Dump Analysis: Mainframe programmers and system programmers analyze
SVC dumpsorabend dumpswhere the PSW and its ILC field are critical for locating the exact instruction that led to a program termination or error. - Operating System Interrupt Processing: The z/OS kernel uses the ILC during interrupt processing to determine the length of the instruction that was interrupted, allowing it to correctly resume execution or diagnose the cause of the interruption.
- Normal Instruction Execution: During normal program execution, the CPU uses the ILC to increment the
Related Concepts
The ILC is an integral part of the Program Status Word (PSW), which is the central control register of the CPU, governing the state of the system and the executing program. It works in conjunction with the Instruction Address (IA) field of the PSW to ensure proper instruction sequencing. When a program check occurs, the ILC is vital for identifying the length of the instruction that caused the exception, directly impacting debugging and error analysis. Its values are inherently tied to the instruction formats defined by the z/Architecture, as each instruction format (e.g., RR, RX, RS) has a predefined length (2